Memory devices are typically provided as internal storage areas in the computer. The term memory identifies data storage that comes in the form of integrated circuit chips. There are several different types of memory used in modern electronics, one common type is RAM (random-access memory). RAM is characteristically found in use as main memory in a computer environment. RAM refers to read and write memory; that is, you can both write data into RAM and read data from RAM. This is in contrast to ROM, which permits you only to read data. Most RAM is volatile, which means that it requires a steady flow of electricity to maintain its contents. As soon as the power is turned off, whatever data was in RAM is lost.
Computers almost always contain a small amount of read-only memory (ROM) that holds instructions for starting up the computer. Unlike RAM, ROM cannot be written to. An EEPROM (electrically erasable programmable read-only memory) is a special type non-volatile ROM that can be erased by exposing it to an electrical charge. EEPROM comprise a large number of memory cells having electrically isolated gates (floating gates). Data is stored in the memory cells in the form of charge on the floating gates. Charge is transported to or removed from the floating gates by specialized programming and erase operations, respectively.
Yet another type of non-volatile memory is a Flash memory. A Flash memory is a type of EEPROM that can be erased and reprogrammed in blocks instead of one byte at a time. A typical Flash memory comprises a memory array, which includes a large number of memory cells. Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. The data in a cell is determined by the presence or absence of the charge in the floating gate. The cells are usually grouped into sections called “erase blocks”. Each of the cells within an erase block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation, wherein all floating gate memory cells in the erase block are erased in a single operation.
Because all the cells in an erase block of a Flash memory device must be erased all at once, one cannot directly rewrite a Flash memory cell without first engaging in a block erase operation. Erase block management (EBM) provides an abstraction layer for this to the host, allowing the Flash device to appear as a freely rewrite-able device. Erase block management also allows for load leveling of the internal floating gate memory cells to help prevent write fatigue failure. Write fatigue is where the floating gate memory cell, after repetitive writes and erasures, no longer properly erases and removes charge from the floating gate. Load leveling procedures increase the mean time between failure of the erase block and Flash memory device as a whole.
As stated above, the erase block management routines provide the necessary linkage between the host and the internal Flash memory device erase block array. Logically mapping logical sectors to physical sectors on the Flash device and managing block erasure. In many modern Flash memory devices implementations, the host interface and erase block management routines additionally allow the Flash memory device to appear as a read/write mass storage device (i.e., a magnetic disk) to the host.
One such approach is to conform the interface to the Flash memory to be identical to a standard interface for a conventional magnetic hard disk drive allowing the Flash memory device to appear as a block read/write mass storage device or disk. This approach has been codified by the PCMCIA standardization committee, which promulgated a standard for supporting Flash memory systems with a hard disk drive protocol. A Flash memory device or Flash memory card (including one or more Flash memory array chips) whose interface meets this standard can be plugged into a host system having a standard DOS or compatible operating system with a PCMCIA-ATA (or standard ATA) interface.
Many of the modern computer operating systems, such as “DOS” (Disk Operating System), were developed to support the physical characteristics of hard drive structures; supporting file structures based on heads, cylinders and sectors. The DOS software stores and retrieves data based on these physical attributes. Magnetic hard disk drives operate by storing polarities on magnetic material. This material is able to be rewritten quickly and as often as desired. These characteristics have allowed DOS to develop a file structure that stores files at a given location which is updated by a rewrite of that location as information is changed. Essentially all locations in DOS are viewed as fixed and do not change over the life of the disk drive being used therewith, and are easily updated by rewrites of the smallest supported block of this structure. A sector (of a magnetic disk drive) is the smallest unit of storage that the DOS operating system supports. In particular, a sector has come to mean 512 bytes of information for DOS and most other operating systems in existence. Flash memory systems that emulate the storage characteristics of hard disk drives are preferably structured to support storage in 512 byte blocks along with additional storage for overhead associated with mass storage, such as ECC (error correction code) bits and/or redundant bits.
To not lose the state of the various erase blocks in a Flash memory device, erase block management routines keep summary erase block management data, such as available blocks, invalid blocks to be erased, logical to physical address mapping, valid (full) blocks, partially full block, and etc. This erase block management data in a Flash device of the prior art is kept in special non-volatile tables within the Flash device. To improve performance of the device, this erase block management data is copied into internal RAM data structures to improve overall device operation. The non-volatile tables, however, must be updated with each change made to the Flash memory device erase blocks and erase block management data to prevent loss of the Flash memory state data in case of power failure.
The update to the non-volatile erase block management data table often requires that the non-volatile erase block management data table themselves be erased before they can be updated. This introduces additional overhead in the Flash memory device update process, requiring at least two or more Flash block writes and/or erases for each data write to the Flash memory; one for the user data and one for the erase block management data, with possible block erasures required. This has the effect of slowing overall Flash device operation. In addition, with the concentration of writes and erasures in the non-volatile erase block management data tables, the non-volatile erase block management data tables are thus, ironically, some of most likely to see errors from floating gate memory cell write fatigue.
FIG. 1 shows a simplified diagram of a Flash memory of the prior art. Internally to the Flash memory device a control state machine 110 directs internal operation of the Flash memory device; managing the Flash memory array 112 and updating RAM control registers and tables 114 and the non-volatile erase block management registers and tables 128. The RAM control registers and tables 114 are loaded at power up from the non-volatile erase block management registers and tables 128 by the control state machine 110. The Flash memory array 112 contains a sequence of erase blocks 116. Each erase block 116 contains a series of sectors 118 that include a user data space 120 and a control data space 122. The control data space 122 contains overhead information for operation of the sector, such as an error correction code (not shown). The user data space 120 in each sector 118 is typically 512 bytes long. In a typical Flash memory device 100 each erase block 116 typically contains 128 sectors 118.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a Flash memory device that has an erase block management method and data that allows for single write/erase updates of the Flash memory device. There is also a need in the art for an erase block management method and data that has improved write fatigue characteristics.